1. Field of the Invention
The present invention generally relates to a semiconductor device having an internal wire, and more specifically, it relates to a semiconductor device having an internal wire which is connected to a conductive layer whose surface is silicified. The present invention also relates to a method of fabricating a semiconductor device having such an internal wire.
2. Description of the Background Art
A semiconductor device such as a static random access memory (SRAM) or a dynamic random access memory (DRAM) is recently implemented with higher density of integration, followed by reduction of elements as formed. In a semiconductor device which is formed by a transistor of a MOS structure, reduction of a source/drain region is required following refinement of a gate electrode, leading to requirement for reduction in diameter of a contact hole for forming a wire etc. However, such reduction of the source/drain region and the diameter of the contact hole causes increase in resistance of the source/drain, gate resistance and contact resistance of the transistor, leading to deterioration in characteristics of the semiconductor device. In order to solve this problem, proposed is a salicide (self aligned silicide) process of forming layers of a silicide, which is a compound of a metal and silicon, on the source/drain and the gate electrode in a self-aligned manner.
It is conceivably possible to solve the problem following reduction of the elements through the salicide process. When this process is applied to a large scale integrated circuit such as an SRAM or a DRAM, however, a new problem is caused as follows:
In construction of such a large scale integrated circuit, it is necessary to connect elements forming the SRAM or the DRAM.
FIG. 28 is a plan view showing a memory cell (hereinafter referred to as a static memory cell) of an SRAM, and FIG. 29 is an equivalent circuit diagram of the static memory cell. Referring to these figures, the static memory cell comprises access transistors ATR1 and ATR2, and driver transistors DTR1 and DTR2. The static memory cell forms a flip-flop, and the driver transistor DTR1 has a drain which is connected with a gate of the access transistor ATR2 by an internal wire. In general, this internal wire is prepared from a heat resistant material such as polysilicon, to be capable of withstanding heat treatment which is carried out in a later step at a high temperature of up to 900.degree. C.
Steps of fabricating the memory cell of the conventional SRAM are now described, to explain a problem which is caused when polysilicon is employed as the material for the wire and the transistors are formed through a salicide process.
FIG. 30A is a sectional view taken along the line A--A in FIG. 30B, which is a plan view. Referring to FIGS. 30A and 30B, LOCOS films 4 are formed on a major surface of a silicon substrate 21. Gates 2 and 3 of the access transistor ATR2 and the driver transistor DTR1 are formed on the silicon substrate 21 respectively, to be adjacent to each other. Further, a source/drain region 6 and side wall spacers 5 are formed.
Referring to FIG. 31, a titanium film 7 is formed on the silicon substrate 21 by sputtering, to cover the gates 2 and 3 while being in contact with the source/drain region 6.
Referring to FIGS. 31, 32A and 32B, heat treatment is carried out through a lamp annealer at a temperature of about 700.degree. C. in a nitrogen atmosphere, to react titanium with silicon. At this time, instable titanium silicide films (TiSi.sub.x) 8 are formed on the gates 2 and 3. On the other hand, the titanium film 7 provided on the side wall spacers 5 and the LOCOS films 4 is reacted not with the oxide films but with nitrogen contained in the atmosphere, to form a titanium nitride film 9.
Referring to FIGS. 32A, 32B and 33, the titanium nitride film 9 and unreacted titanium are removed by a solution consisting of sulfuric acid and hydrogen peroxide.
Referring to FIG. 33, the instable titanium silicide films 8 are made of an instable titanium silicide of high resistance, a compound of titanium and silicon expressed as TiSi.sub.x, which is not converted to TiSi.sub.2 of low resistance.
Referring to FIGS. 33 and 34, heat treatment is carried out through a lamp annealer at a temperature of about 800.degree. C., in order to convert the compound TiSi.sub.x to TiSi.sub.2 of low resistance. Thus, the instable titanium silicide films 8 are converted to stable titanium silicide films 10 of low resistance. Thus, silicified transistors are formed.
The structure of an internal wire is now described. Referring to FIGS. 35A and 35B, an interlayer insulating film 11 is formed on the silicified transistors. A contact hole 12 is formed in the interlayer insulating film 11 by reactive ion etching, for exposing surfaces of the source/drain region 6 and an end of the gate 3 of the driver transistor DTR1. At this time, the titanium silicide films 10 which are formed on the surfaces of the gate 3 and the source/drain region 6 are not etched due to selectivity against gas which is employed for etching the oxide film.
Referring to FIG. 36, a polysilicon film 13 is formed on the silicon substrate 21 by CVD, to be embedded in the contact hole 12. This polysilicon film 13 is adapted to form an internal wiring layer, as described later. In the conventional method, a problem is caused in formation of the polysilicon film 13, as hereafter described.
Referring to FIG. 42, silane (SiH.sub.4) gas is employed as source gas for forming a polysilicon film. The silane gas is decomposed by heat to form nuclei on a depositional surface, so that a film is thereafter grown from the nuclei. This growth strongly depends on the state of the depositional surface. This state is well known in relation to silicon, but not well known in relation to a depositional surface of a metal. The inventors have confirmed that the following abnormality is caused when a polysilicon film is formed on the titanium silicide films 10 by CVD:
In the titanium silicide layers 10, impurity diffusion coefficients are so large that silicon radicals (Si*) formed by decomposition of the silane gas are readily diffused in the titanium silicide layers 10, to reach interfaces between the titanium silicide layers 10 and silicon (1). Referring to FIG. 43, polysilicon is thereafter grown on the interfaces between the titanium silicide layers 10 and the silicon (1) to push up the upper titanium silicide layers 10, and to finally break the same. When this phenomenon is caused in the internal wire of the memory cell of the SRAM, this leads to increase in contact resistance.
Referring to FIGS. 36, 37A and 37B, the polysilicon film 13 is patterned to form an internal wiring layer 14. An impurity is implanted into the internal wiring layer 14, to reduce its resistance.
Referring to FIG. 38, an interlayer insulating film 15, which is an oxide film, is formed on the silicon substrate 21, to cover the internal wiring layer 14.
Referring to FIGS. 39A and 39B, a contact hole 16 is formed in the interlayer insulating film 15, for partially exposing the surface of the internal wiring layer 14.
Referring to FIGS. 39A, 39B, 40A and 40B, a polysilicon film 17 is deposited on the silicon substrate 21, to be embedded in the contact hole 16. This polysilicon film 17 is patterned in the form of a resistor, which corresponds to a resistor 17 in the equivalent circuit shown in FIG. 29.
Referring to FIGS. 41A and 41B, a thick interlayer insulating film 18 is deposited on the silicon substrate 21, to cover the polysilicon film 17. A contact hole 19 is formed in this interlayer insulating film 18, and a tungsten plug 33 is embedded in this contact hole 19. An aluminum wire 20 is formed to be connected to the tungsten plug 33, thereby completing the memory cell of the SRAM.
In the aforementioned conventional method of fabricating an internal wire, polysilicon is abnormally grown as shown in FIGS. 42 and 43, to increase the contact resistance. Further, the wire itself is increased in resistance due to reduction in width of the internal wire, to remarkably deteriorate characteristics of the semiconductor device.